diff --git a/sys/arm/conf/POGOPLUGV4 b/sys/arm/conf/POGOPLUGV4 new file mode 100644 index 0000000..bf442b1 --- /dev/null +++ b/sys/arm/conf/POGOPLUGV4 @@ -0,0 +1,182 @@ +# +# Custom kernel for PogoPlug V4 devices. +# +# $FreeBSD: $ +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD: $ +# + +ident POGOPLUGV4 + +include "../mv/kirkwood/std.db88f6xxx" + +makeoptions FDT_DTS_FILE=pogoplugv4.dts + +makeoptions MODULES_OVERRIDE="" + +options SOC_MV_KIRKWOOD +options SOC_MV_88F6192 # To fix bad ID returned from 6192 + +options SCHED_4BSD # 4BSD scheduler +options INET # InterNETworking +options INET6 # IPv6 communications protocols +options SOFTUPDATES +options CD9660 # ISO 9660 filesystem +options FFS # Berkeley Fast Filesystem +options TMPFS # Efficient memory filesystem +options MSDOSFS # MS DOS File System (FAT, FAT32) +options NULLFS # NULL filesystem +options SYSVSHM # SYSV-style shared memory +options SYSVMSG # SYSV-style message queues +options SYSVSEM # SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options GEOM_ELI # Disk encryption. +options GEOM_LABEL # Providers labelization. +options GEOM_PART_GPT # GPT partitioning + +# Flattened Device Tree +device fdt +options FDT +options FDT_DTB_STATIC + +# Misc pseudo devices +device bpf # Required for DHCP +device faith # IPv6-to-IPv4 relaying (translation) +device firmware # firmware(9) required for USB wlan +device gif # IPv6 and IPv4 tunneling +device loop # Network loopback +device md # Memory/malloc disk +device pty # BSD-style compatibility pseudo ttys +device random # Entropy device +device tun # Packet tunnel. +device ether # Required for all ethernet devices +device vlan # 802.1Q VLAN support +device wlan # 802.11 WLAN support +device wlan_wep # 802.11 WEP support +device wlan_ccmp # 802.11 CCMP support +device wlan_tkip # 802.11 TKIP support + + +# cam support for umass and ahci +device scbus +device pass +device da + +# Serial ports +device uart + +# Networking +device mge # Marvell Gigabit Ethernet controller +device mii +device e1000phy + +# PCI/PCIE +device pci + +# USB +options USB_HOST_ALIGN=32 # Align DMA to cacheline +#options USB_DEBUG # Compile in USB debug support +device usb # Basic usb support +device ehci # USB 2 host controller +device xhci # USB 3 host controller +device umass # Mass storage +device uhid # Human-interface devices +device rum # Ralink Technology RT2501USB wireless NICs +device uath # Atheros AR5523 wireless NICs +device ural # Ralink Technology RT2500USB wireless NICs +device zyd # ZyDAS zb1211/zb1211b wireless NICs +#device urtw # Realtek RTL8187B/L USB +device urtwn # Realtek RTL8192CU USB +device urtwnfw # " firmware +device upgt # Conexant/Intersil PrismGT SoftMAC USB +device u3g # USB-based 3G modems (Option, Huawei, Sierra) + +# I2C (TWSI) +device iic +device iicbus + +# Sound +device sound +device snd_uaudio + +#crypto +device cesa # Marvell security engine +device crypto +device cryptodev + +# IPSec +device enc +options IPSEC +options IPSEC_NAT_T +options TCP_SIGNATURE # include support for RFC 2385 + +# IPFW +options IPFIREWALL +options IPFIREWALL_DEFAULT_TO_ACCEPT +options IPFIREWALL_VERBOSE +options IPFIREWALL_VERBOSE_LIMIT=100 +options IPFIREWALL_NAT +options LIBALIAS +options DUMMYNET +options IPDIVERT + +#PF +device pf +device pflog +device pfsync + +# ALTQ, required for PF +options ALTQ # Basic ALTQ support +options ALTQ_CBQ # Class Based Queueing +options ALTQ_RED # Random Early Detection +options ALTQ_RIO # RED In/Out +options ALTQ_HFSC # Hierarchical Packet Scheduler +options ALTQ_CDNR # Traffic conditioner +options ALTQ_PRIQ # Priority Queueing +options ALTQ_NOPCC # Required if the TSC is unusable +#options ALTQ_DEBUG + +# Debugging +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +options DDB +options KDB +#options DIAGNOSTIC +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS # Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options WITNESS_KDB + +# Enable these options for nfs root configured via BOOTP. +options NFSCL # Network Filesystem Client +options NFSLOCKD # Network Lock Manager +#options NFS_ROOT # NFS usable as /, requires NFSCLIENT +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=mge0 + +# If not using BOOTP, use something like one of these... +#options ROOTDEVNAME=\"ufs:/dev/da0a\" +#options ROOTDEVNAME=\"ufs:/dev/da0s1a\" +# Using this option requires the root file system to be labeled 'kirkwoodroot' +options ROOTDEVNAME=\"ufs:/dev/ufs/kirkwoodroot\" +#options ROOTDEVNAME=\"ufs:/dev/da0p10\" +#options ROOTDEVNAME=\"nfs:192.168.0.254/pogoplugv4\" + diff --git a/sys/arm/mv/gpio.c b/sys/arm/mv/gpio.c index 1bdb81b..4242a20 100644 --- a/sys/arm/mv/gpio.c +++ b/sys/arm/mv/gpio.c @@ -158,6 +158,10 @@ mv_gpio_attach(device_t dev) sc->pin_num = 32; sc->irq_num = 4; + } else if (dev_id == MV_DEV_88F6192) { + sc->pin_num = 36; + sc->irq_num = 7; /* ???? */ + } else if (dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_88F6282) { sc->pin_num = 50; diff --git a/sys/arm/mv/ic.c b/sys/arm/mv/ic.c index 244b3fd..0b102fa 100644 --- a/sys/arm/mv/ic.c +++ b/sys/arm/mv/ic.c @@ -108,7 +108,8 @@ mv_ic_attach(device_t dev) sc->ic_high_regs = 0; sc->ic_error_regs = 0; - if (dev_id == MV_DEV_88F6281 || + if (dev_id == MV_DEV_88F6192 || + dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_88F6282 || dev_id == MV_DEV_MV78100 || dev_id == MV_DEV_MV78100_Z0) diff --git a/sys/arm/mv/mv_common.c b/sys/arm/mv/mv_common.c index 44c22cb..c6abaf5 100644 --- a/sys/arm/mv/mv_common.c +++ b/sys/arm/mv/mv_common.c @@ -315,6 +315,7 @@ cpu_extra_feat(void) soc_id(&dev, &rev); switch (dev) { + case MV_DEV_88F6192: case MV_DEV_88F6281: case MV_DEV_88F6282: case MV_DEV_88RC8180: @@ -378,6 +379,12 @@ soc_id(uint32_t *dev, uint32_t *rev) */ *dev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 0) >> 16; *rev = bus_space_read_4(fdtbus_bs_tag, MV_PCIE_BASE, 8) & 0xff; + +#ifdef SOC_MV_88F6192 + /* 88F6192 appears to return 0x6281! */ + if (*dev == MV_DEV_88F6281) + *dev = MV_DEV_88F6192; +#endif } static void @@ -414,6 +421,15 @@ soc_identify(void) else if (r == 6) rev = "D2"; break; + case MV_DEV_88F6192: + dev = "Marvell 88F6192"; + if (r == 0) + rev = "Z0"; + else if (r == 2) + rev = "A0"; + else if (r == 3) + rev = "A1"; + break; case MV_DEV_88F6281: dev = "Marvell 88F6281"; if (r == 0) @@ -475,6 +491,7 @@ soc_identify(void) (mode & CPU_CONFIG_DC_PREF) ? "enabled" : "disabled"); switch (d) { + case MV_DEV_88F6192: case MV_DEV_88F6281: case MV_DEV_88F6282: mode = read_cpu_ctrl(CPU_L2_CONFIG) & CPU_L2_CONFIG_MODE; @@ -719,6 +736,7 @@ win_cpu_can_remap(int i) /* Depending on the SoC certain windows have remap capability */ if ((dev == MV_DEV_88F5182 && i < 2) || (dev == MV_DEV_88F5281 && i < 4) || + (dev == MV_DEV_88F6192 && i < 4) || (dev == MV_DEV_88F6281 && i < 4) || (dev == MV_DEV_88F6282 && i < 4) || (dev == MV_DEV_88RC8180 && i < 2) || @@ -1628,6 +1646,7 @@ xor_max_eng(void) soc_id(&dev, &rev); switch (dev) { + case MV_DEV_88F6192: case MV_DEV_88F6281: case MV_DEV_88F6282: case MV_DEV_MV78130: diff --git a/sys/arm/mv/mvreg.h b/sys/arm/mv/mvreg.h index 1d6efed..fb4bc52 100644 --- a/sys/arm/mv/mvreg.h +++ b/sys/arm/mv/mvreg.h @@ -412,6 +412,7 @@ #define MV_DEV_88F5181 0x5181 #define MV_DEV_88F5182 0x5182 #define MV_DEV_88F5281 0x5281 +#define MV_DEV_88F6192 0x6192 #define MV_DEV_88F6281 0x6281 #define MV_DEV_88F6282 0x6282 #define MV_DEV_88F6781 0x6781 diff --git a/sys/boot/fdt/dts/arm/pogoplugv4.dts b/sys/boot/fdt/dts/arm/pogoplugv4.dts new file mode 100644 index 0000000..be4bc67 --- /dev/null +++ b/sys/boot/fdt/dts/arm/pogoplugv4.dts @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2015 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Semihalf under sponsorship from + * the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * PogoPlug V4 (Marvell 88F6192) Device Tree Source. + * + * $FreeBSD: $ + */ + +/dts-v1/; + +/ { + model = "pogoplug,V4"; + compatible = "PogoPlugV4"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + mpp = &MPP; + pci0 = &pci0; + serial0 = &serial0; + serial1 = &serial1; + soc = &SOC; + sram = &SRAM; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "ARM,88FR131"; + reg = <0x0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <0x4000>; // L1, 16K + i-cache-size = <0x4000>; // L1, 16K + timebase-frequency = <0>; + bus-frequency = <0>; + clock-frequency = <0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x8000000>; // 128M at 0x0 + }; + + localbus@f1000000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "mrvl,lbc"; + + /* This reflects CPU decode windows setup for NAND access. */ + ranges = <0x0 0x2f 0xf9300000 0x00100000>; + + nand@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mrvl,nfc"; + reg = <0x0 0x0 0x00100000>; + bank-width = <2>; + device-width = <1>; + }; + }; + + SOC: soc88f6192@f1000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0x0 0xf1000000 0x00100000>; + bus-frequency = <0>; + + PIC: pic@20200 { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + reg = <0x20200 0x3c>; + compatible = "mrvl,pic"; + }; + + timer@20300 { + compatible = "mrvl,timer"; + reg = <0x20300 0x30>; + interrupts = <1>; + interrupt-parent = <&PIC>; + mrvl,has-wdt; + }; + + MPP: mpp@10000 { + #pin-cells = <2>; + compatible = "mrvl,mpp"; + reg = <0x10000 0x34>; + pin-count = <36>; + pin-map = < + 0 1 /* MPP[0]: NF_IO[2] */ + 1 1 /* MPP[1]: NF_IO[3] */ + 2 1 /* MPP[2]: NF_IO[4] */ + 3 1 /* MPP[3]: NF_IO[5] */ + 4 1 /* MPP[4]: NF_IO[6] */ + 5 1 /* MPP[5]: NF_IO[7] */ + 6 1 /* MPP[6]: SYSRST_OUTn */ + 8 2 /* MPP[8]: UA0_RTS */ + 9 2 /* MPP[9]: UA0_CTS */ + 10 3 /* MPP[10]: UA0_TXD */ + 11 3 /* MPP[11]: UA0_RXD */ + 12 1 /* MPP[12]: SD_CLK */ + 13 1 /* MPP[13]: SD_CMD */ + 14 1 /* MPP[14]: SD_D[0] */ + 15 1 /* MPP[15]: SD_D[1] */ + 16 1 /* MPP[16]: SD_D[2] */ + 17 1 /* MPP[17]: SD_D[3] */ + 18 1 /* MPP[18]: NF_IO[0] */ + 19 1 /* MPP[19]: NF_IO[1] */ + 20 5 /* MPP[20]: SATA1_AC */ + 21 5 /* MPP[21]: SATA0_AC */ + 29 1 >; /* MPP[29]: TSMP[9] */ + }; + + GPIO: gpio@10100 { + #gpio-cells = <3>; + compatible = "mrvl,gpio"; + reg = <0x10100 0x20>; + gpio-controller; + interrupts = <35 36 37 38 39 40 41>; + interrupt-parent = <&PIC>; + }; + + rtc@10300 { + compatible = "mrvl,rtc"; + reg = <0x10300 0x08>; + }; + + twsi@11000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,twsi"; + reg = <0x11000 0x20>; + interrupts = <43>; + interrupt-parent = <&PIC>; + }; + + enet0: ethernet@72000 { + #address-cells = <1>; + #size-cells = <1>; + model = "V2"; + compatible = "mrvl,ge"; + reg = <0x72000 0x2000>; + ranges = <0x0 0x72000 0x2000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <12 13 14 11 46>; + interrupt-parent = <&PIC>; + phy-handle = <&phy0>; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "mrvl,mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + + serial0: serial@12000 { + compatible = "ns16550"; + reg = <0x12000 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <33>; + interrupt-parent = <&PIC>; + }; + + serial1: serial@12100 { + compatible = "ns16550"; + reg = <0x12100 0x20>; + reg-shift = <2>; + clock-frequency = <0>; + interrupts = <34>; + interrupt-parent = <&PIC>; + }; + + crypto@30000 { + compatible = "mrvl,cesa"; + reg = <0x30000 0x10000>; + interrupts = <22>; + interrupt-parent = <&PIC>; + + sram-handle = <&SRAM>; + }; + + usb@50000 { + compatible = "mrvl,usb-ehci", "usb-ehci"; + reg = <0x50000 0x1000>; + interrupts = <48 19>; + interrupt-parent = <&PIC>; + }; + + xor@60000 { + compatible = "mrvl,xor"; + reg = <0x60000 0x1000>; + interrupts = <5 6 7 8>; + interrupt-parent = <&PIC>; + }; + + sata@80000 { + compatible = "mrvl,sata"; + reg = <0x80000 0x6000>; + interrupts = <21>; + interrupt-parent = <&PIC>; + }; + }; + + SRAM: sram@fd000000 { + compatible = "mrvl,cesa-sram"; + reg = <0xfd000000 0x00100000>; + }; + + pci0: pcie@f1040000 { + compatible = "mrvl,pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xf1040000 0x2000>; + bus-range = <0 255>; + ranges = <0x02000000 0x0 0xf1300000 0xf1300000 0x0 0x04000000 + 0x01000000 0x0 0x00000000 0xf1100000 0x0 0x00100000>; + clock-frequency = <33333333>; + interrupt-parent = <&PIC>; + interrupts = <44>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + /* IDSEL 0x1 */ + 0x0800 0x0 0x0 0x1 &PIC 0x9 + 0x0800 0x0 0x0 0x2 &PIC 0x9 + 0x0800 0x0 0x0 0x3 &PIC 0x9 + 0x0800 0x0 0x0 0x4 &PIC 0x9 + >; + pcie@0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0x0 0xf1300000 + 0x02000000 0x0 0xf1300000 + 0x0 0x04000000 + + 0x01000000 0x0 0x0 + 0x01000000 0x0 0x0 + 0x0 0x00100000>; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; diff --git a/sys/conf/options.arm b/sys/conf/options.arm index 79d6641..ab6c7e9 100644 --- a/sys/conf/options.arm +++ b/sys/conf/options.arm @@ -42,6 +42,7 @@ SOC_MV_DISCOVERY opt_global.h SOC_MV_DOVE opt_global.h SOC_MV_FREY opt_global.h SOC_MV_KIRKWOOD opt_global.h +SOC_MV_88F6192 opt_global.h SOC_MV_LOKIPLUS opt_global.h SOC_MV_ORION opt_global.h SOC_OMAP3 opt_global.h diff --git a/sys/dev/cesa/cesa.c b/sys/dev/cesa/cesa.c index ed6a7ef..4db5d3d 100644 --- a/sys/dev/cesa/cesa.c +++ b/sys/dev/cesa/cesa.c @@ -1007,6 +1007,7 @@ cesa_attach(device_t dev) soc_id(&d, &r); switch (d) { + case MV_DEV_88F6192: case MV_DEV_88F6281: case MV_DEV_88F6282: sc->sc_tperr = 0; diff --git a/sys/dev/mge/if_mge.c b/sys/dev/mge/if_mge.c index 43d441e..4d2d228 100644 --- a/sys/dev/mge/if_mge.c +++ b/sys/dev/mge/if_mge.c @@ -260,8 +260,10 @@ mge_ver_params(struct mge_softc *sc) uint32_t d, r; soc_id(&d, &r); - if (d == MV_DEV_88F6281 || d == MV_DEV_88F6781 || + if (d == MV_DEV_88F6192 || + d == MV_DEV_88F6281 || d == MV_DEV_88F6282 || + d == MV_DEV_88F6781 || d == MV_DEV_MV78100 || d == MV_DEV_MV78100_Z0 || (d & MV_DEV_FAMILY_MASK) == MV_DEV_DISCOVERY) { diff --git a/sys/dev/mvs/mvs_soc.c b/sys/dev/mvs/mvs_soc.c index 14579d0..f2064b5 100644 --- a/sys/dev/mvs/mvs_soc.c +++ b/sys/dev/mvs/mvs_soc.c @@ -62,6 +62,7 @@ static struct { int quirks; } mvs_ids[] = { {MV_DEV_88F5182, 0x00, "Marvell 88F5182", 2, MVS_Q_GENIIE|MVS_Q_SOC}, + {MV_DEV_88F6192, 0x00, "Marvell 88F6192", 2, MVS_Q_GENIIE|MVS_Q_SOC}, {MV_DEV_88F6281, 0x00, "Marvell 88F6281", 2, MVS_Q_GENIIE|MVS_Q_SOC}, {MV_DEV_88F6282, 0x00, "Marvell 88F6282", 2, MVS_Q_GENIIE|MVS_Q_SOC}, {MV_DEV_MV78100, 0x00, "Marvell MV78100", 2, MVS_Q_GENIIE|MVS_Q_SOC},